Our Bit Synchronizers reconstruct the input data stream and recover the clock with the highest fidelity to allow the processing system to produce the most meaningful information.
As a key component in a telemetry ground station, the PCM Bit Synchronizer must reconstruct its input data stream and recover the clock with the highest fidelity to allow the processing system to produce the most meaningful information.
Our Bit Synchronizers are better than 1dB from theory all the way down to –3dB Eb/No, at input signal levels down to 100mV. Above all of the other performance items, this is a major discriminator between the GDP Bit Synchronizer and other Bit Synchronizers on the market today. This translates to significantly less lock dropouts on down stream frame synchronizers and decommutators, resulting in significantly more usable data during receiver fade and multi-path situations, typically occurring at the most critical part of the mission, when the aircraft is performing the test maneuver.
Real world data integrity is very sensitive to Bit Synchronizer jitter performance. Static bit error rate tests do not evaluate bit synchronizers under real world conditions. Real world signals are affected by jitter which adversely affects the data recovery ability of a bit synchronizer. This is further exasperated when multiple bit synchronizers are connected in series.
See our Technical Paper: ‘Series Connected Bit Synchronizers Need Sequentially Increased Loop Bandwidths‘ for more information. Proper evaluation of bit synchronizer performance in the presence of jitter can be measured using the GDP Model 650 Bit Error Rate Test Set with the jitter test option.
- Superior Bit Error and Jitter Performance
- Built-in BERT / Frame Sync
- QPSK, OQPSK, SOQPSK Merging
- Best Source DQE/DQM Output
- 10 bps to 40+ Mbps
- Single or Multi-channel Rackmount Units
- Single or Dual-channel PCI Cards
Model 2265 Multi-Channel PCM Bit Synchronizer houses up to 4 bit synchronizer channels in a 2U chassis. The Model 2265 is capable of maintaining synchronization with the signal of interest down to –3 dB Eb/No at signal levels down to 100mVpp.
Model 2365A Multi-Channel PCM Bit Sync houses up to 8 channels in a 4U chassis. Control and monitoring of all parameters and features is accomplished by way of the local control interface using a PC, mouse (optional touch-screen) and keyboard.
Model 2430D provides a signal I/O interface which allows a wide variety of standard unit input and output configurations to be offered at the time of order, making any rear panel connector assignable as to type, signal function and termination.
Model 270 Multi-Channel (8 or 16 Channels) Bit Synchronizer unit with Digital I/O is a compact device that is designed to extract usable digital data and provide an output clock from serial digital input streams. Eight additional channels can be added (16 channels total) to the box as an option.
Model BSM202 is a Dual Channel PCM Bit Sync on a single PCI card with single channel configurations also available. The BSM202 is a designed to extract usable digital data from a noise contaminated signal environment.
Model 2265EC can be used as a stand-alone bit synchronizer and as a data Encapsulator for the GDP Diversity Combiner / Best Source Selector products. The GDP Model 2265EC Multi-Channel PCM Bit Synchronizer / Encapsulator houses up to 4 high performance bit synchronizer channels in a 2U chassis. The optimized digital design of this unit affords the highest performance characteristics currently available.
For information about the legacy products we support but no longer supply the software or hardware, click here.