Model 2365A Multi-Channel Touch-Screen PCM Bit Synchronizer
  • Full-function Bit Synchronizers (Up to 8 channels)
  • Touch-screen (color) and Key Board Control
  • Built-in Simulators
  • Total Status and Signal Quality Display
  • Unbeaten performance in jitter and noise in worldwide side-by-side testing
  • Superior Jitter Performance Unmatched in the Industry
  • Internal Frame Sync Pattern Detectors and Viterbi Decoders for each channel

The GDP Model 2365A Multi-Channel PCM Bit Synchronizer houses up to 8 high-performance bit synchronizer channels in a 4U chassis. The optimized digital design of this unit affords the highest performance characteristics currently available.

Control and monitoring of all parameters and features is accomplished by way of the local control interface using a PC, mouse (optional touch-screen) and keyboard. Remote control of the unit is through an Ethernet interface. (Other interfaces are available.)

The bit synchronizers are capable of maintaining synch at –3 dB Eb/No with signal levels as low as 0.1 Vp-p. Search acquisition is attainable in less than 50 bits and synchronization is maintained for a period of at least 256 bit periods without a transition.

Two Analog inputs are provided per channel. Optional digital inputs for RS-422 and TTL levels may be included. Each channel presents a variety of standard outputs to support complex system requirements. (Special outputs are available.)

A standard IRIG 106 randomizer/derandomizer (forward and reverse) is included as is a CCITTV.35 and V.36 descrambler. A variety of Viterbi decoders are available including R1/2 K7 (Std), R3/4 K7and R1/3 k7 (please inquire for other FEC options). Reed Solomon Decoding is an available option.

The Pattern Detector adds an additional level of synchronization assurance by invoking the Frame Pattern Detector. Automatic Polarity Correction (APC) may be invoked when using the Pattern Detector.

Data-stream quality is measured and reported to the user in the form of: Eb/No, Frame Synch Pattern BER / Viterbi Decoder CER. A data stream generator / simulator is available to facilitate system testing, and providing a BERT function.

An Auto Scan feature is available that allows the bit synchronizers to scan the input for up to 8 pre-selected bit rates, input codes and frame patterns. When an acceptable signal is present, the Bit Synchronizer automatically locks to it and recovers the data and clock. Should this signal drop-out, the bit synchronizer reinitiates the scan sequence.

Model 2365A Multi-Channel Touch-Screen PCM Bit Synchronizer
  • Full-function Bit Synchronizers (Up to 8 channels)
  • Touch-screen (color) and Key Board Control
  • Built-in Simulators
  • Total Status and Signal Quality Display
  • Unbeaten performance in jitter and noise in worldwide side-by-side testing
  • Superior Jitter Performance Unmatched in the Industry
  • Internal Frame Sync Pattern Detectors and Viterbi Decoders for each channel

The GDP Model 2365A Multi-Channel PCM Bit Synchronizer houses up to 8 high-performance bit synchronizer channels in a 4U chassis. The optimized digital design of this unit affords the highest performance characteristics currently available.

Control and monitoring of all parameters and features is accomplished by way of the local control interface using a PC, mouse (optional touch-screen) and keyboard. Remote control of the unit is through an Ethernet interface. (Other interfaces are available.)

The bit synchronizers are capable of maintaining synch at –3 dB Eb/No with signal levels as low as 0.1 Vp-p. Search acquisition is attainable in less than 50 bits and synchronization is maintained for a period of at least 256 bit periods without a transition.

Two Analog inputs are provided per channel. Optional digital inputs for RS-422 and TTL levels may be included. Each channel presents a variety of standard outputs to support complex system requirements. (Special outputs are available.)

A standard IRIG 106 randomizer/derandomizer (forward and reverse) is included as is a CCITTV.35 and V.36 descrambler. A variety of Viterbi decoders are available including R1/2 K7 (Std), R3/4 K7and R1/3 k7 (please inquire for other FEC options). Reed Solomon Decoding is an available option.

The Pattern Detector adds an additional level of synchronization assurance by invoking the Frame Pattern Detector. Automatic Polarity Correction (APC) may be invoked when using the Pattern Detector.

Data-stream quality is measured and reported to the user in the form of: Eb/No, Frame Synch Pattern BER / Viterbi Decoder CER. A data stream generator / simulator is available to facilitate system testing, and providing a BERT function.

An Auto Scan feature is available that allows the bit synchronizers to scan the input for up to 8 pre-selected bit rates, input codes and frame patterns. When an acceptable signal is present, the Bit Synchronizer automatically locks to it and recovers the data and clock. Should this signal drop-out, the bit synchronizer reinitiates the scan sequence.

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