TIME CODE GENERATOR/TRANSLATOR FUNCTIONS (Per Bit Sync)
Amplitude
0.5 to 20V p-p, single-ended
Input Codes
IRIG A, B, or G
Input Frequency
125Hz to 400kHz
Modulation Index
2:1 through 5:1
Polarity
Program selectable: normal/inverted
Leap Year
Program selectable: enable resets days to 1 after 366
Internal Time Base
20MHz crystal oscillator
Generator Mode
Program selectable: generates multiples of 4, 2, 1, 1/2, 1/4 realtime.
Translate Mode
Time read from external source
Translate Carrier Mode
Internal timing clock derived from input carrier. Allows translation to continue as input carrier rate varies during playback of an analog recording
Translate Failsafe Mode
Internal timing clock phase-locked to input carrier. Allows translator to generate time if a time input dropout occurs. Time resolved to microsecs for all input code formats. Program selectable: translates at multiples of 4, 2, 1, 1/2, 1/4 realtime.
Frame Bypass
Automatic frame bypass compares previous time frame to current time frame. Time accumulator is updated on agreement.
Time
BCD time-of-year (days through microseconds) delivered as four 16-bit words at one millisecond and one second intervals
Generator Output
Program selectable: IRIG time codes A, B, and G
Slow Code Output
Datum bi-level or IRIG level shift. Four programmable rates
PAM/PCM FORMAT SIMULATOR FUNCTIONS
Format Storage
Stores two complete, selectable PCM formats. Performs asynchronous frame insertion and format switching
Subframe Capability
Generates up to three subframes within maindrame. Generates subframe within subframe
Frame Length
Up to 65,536 words for the mainframe and 16,384 per subframe
Data Sources
1024 static registers. Two user-defined dynamic data memories. Two 16-bit modulo up/down counters. Two 16-bit external inputs. One 16-bit pseudo-random number generator. One 16-bit program counter
Word Length
Programmable for each data source: static data words 1 to 32 bits; all others 1 to 16 bits
Word Orientation
Program selectable: MSB/LSB for each data word
Parity Generation
Program selectable: leading, trailing, or no parity for each data word
Dynamic Data Memories
2 unique, user-defined 16kB RAM’s. Presettable to ramp, sine, triangle and squarewave functions or user-defined input. selectable data type: 1’s complement, 2’s complement, signed magnitude, offset binary. Programmable time base.
Bit Rate
Program selectable: 1Hz to 64MHz, tunable to 0.1% of programmed rate
Output Codes
Program selectable: NRZ-L/M/S, BiØ-L/M/S, DBiØ-M/S, MDM-M/S, RNRZ 11/15/17/23
PAM Output
2.5 Volts, balanced output, 10mA drive current
PCM Output
TTL compatible NRZ-L data and 0º clock
Hosts Supported
Plugs onto Model 1502V (VME bus) or 1602P (PCI bus) Single-board PCM Data System
Cooling Requirements
30 Linear FPM
Power Requirements
+5VDC at 1.1A, +12VDC at 100mA, -12VDC at 100mA. Power supplied by host board.
Dimensions
5.9″ (15.0cm) H x 3.9″ (9.9cm) W x .35″ (0.9cm) D. Host and module fits in standard slot.
Temperature
Operating: 0º to +40º C, Non-Operating: -40º to +86º C
Relative Humidity
Up to 90% non-condensing
Shock
Operating: 5G, Non-Operating: 25G
Vibration
Operating: 0.3G, 5 to 2000Hz, Non-Operating: >8G, 5 to 500Hz
Specifications subject to change without notice.