PCM Input

Sources

To four program selectable decom inputs supported, TTL NRZ-L Data and 0º Clock. When configured with optional Model 674DM bit sync a fifth program selectable internal bit sync input path is provided.

Impedance

50 Ohm input impedance, TTL compatible.

Bit Rate

From 0 to 50+ Mbps, burst, jam, and streaming mode compatible.

Polarity

Programmable, automatic polarity correction.

Word Length

Programmable, 1 to 32 bit word length for each input.

Word Orientation

Programmable, MSB/LSB orientation for each input word.

Parity

Selectable leading, trailing, or no parity checking for each word.

Synchronization

Mainframe Sync

Provides for programmable sync pattern and mask, complement pattern recognition, and variable length frame decommutation. The pattern may be up to 64 bits in length.

Subframe Sync

Six independent synchronizers are capable of decommutating sub-frames within subframes. Subframes synchronize to fixed recycle patterns, complement frame sync patterns, and various ID patterns. Both recycle and ID patterns may be assembled from multiple word locations. Recycle patterns may be up to 32 bits long.

ID Sync

Two types of ID synchronization are supported: JAM patterns of arbitrary values, and incrementing or decrementing frame counters with limit checking. ID sync words may be up to 16 bits in length.

Sync Strategy

Programmable Search-Check-Lock sync strategy, bit error tolerance, and bit slip window provide reliable frame synchronization.

Asynchronous Formats

Subframe synchronizer may be programmed to decommutate embedded formats having unique frame sync patterns and format structures.

Format Switching

16 testable flags store the results of select input stream bit and word comparisons to control real-time format switching Frame Sync / Decom format switching is loss-less and immediate. Multiple card resident micro-coded decom processing programs are stored in local decom memory in support of such conditional format switching events.

Outputs

Standalone Data Output

Data is available to the host computers PCI bus as memory-mapped frame buffers, Current Value Table (CVT), or as a data stream selectably transferred by PCI bus DMA. Data is 32 bits with programmable MSB/LSB output word justification, sign extension, or zero insertion for LSB output. Acroamatics Telemetry System Software (ATSS) suite provides a host of Windows compatible (XP and Windows 7 compatible) which support user decom set-up, mission set-up management, and a host of real-time data display, alarming, recording, discrete/analog, and networked data I/O processes and local operator status display, and remote system management and data operations support.

I-Buss Data Output

When used in a system configured with new 1635AP PDSP PCeI advanced telemetry processing module(s), the Model 1612AP uses a 64 bit parallel “I-bus” low latency inter-card connection that processes messages containing thirty two bits of data, twelve bits of fine time (microseconds), two bits of status, and 17 bits of data identification. I-bus data can be formatted in either MSB or LSB justified form. LS-justified data can also be sign extended. I-bus decom data is transmitted to the 1605P or new 1615AP PDSP card resident distribution & algorithmic data processor. The 1635AP is capable of from up merging data from any of up to eight 1632AP cards in a system, to form the desired EU processing data and formatted data output products in support of real-time analog (DAC) output, raw or processed data recording, real-time display, and networked data communications processes. Decom and bit sync data quality status words are generated for downstream data validation, as well.

2 Serial PCM Outputs

Two user program controlled RS-422 compatible serial output channels are available

PCM Programmable PCM Format Simulator/Encoder Functions

Format Storage

Stores two complete, selectable PCM formats. Performs asynchronous frame insertion and format switching

Subframe Capability

Generates up to three subframes within mainframe. Generates subframe within subframe

Frame Length

Up to 65,536 words for the mainframe and 16,384 per subframe

Data Sources

1M unique user defined static ans 64k dynamic word registers. Two complete user-defined onboard stream simulation data memories. Two 16-bit module up/down counters. Two 16-bit external inputs. One 16-bit pseudo-random number generator. One 16-bit program counter.

Word Length

Programmable for each data source: static data words 1 to 32 bits; all others 1 to 16 bits

Word Orientation

Program selectable: MSB/LSB for each data word

Parity Generation

Program selectable: leading, trailing, or no parity for each data word

Dynamic Data Memories

2 unique, user-defined 6kB RAM’s. Presettable to ramp, sine, triangle and squarewave functions or user-defined input. Selectable data type: 1’s complement, 2’s complement, signed magnitude, offset binary. Programmable time base.

PCM Outputs

Bit Rate

Program selectable: 1Hz to 64 Mbps, tunable to 0.1% of programmed rate

Clock

0º clock

Data

NRZ-L

Output Codes

Program selectable: NRZ-L/M/S, Biø-L/M/S, DBiø-M/S, DM-M/S, MDM-M/S, RNRZ 11/15/17/23

PCM Output

TTL compatible NRZ-L data and 0º clock

Model 674DM(Option – companion mezzanine module to Model 1632AP

PCM Signal Inputs

Source

Two each analog baseband user selectable PCM inputs – #1 single-ended, #2 single-ended or RS-422

Isolation

greater than 60dB at 20MHz

Impedance

Program selectable: Hi-Z/Lo-Z, Single Ended 4kΩ/75Ω , Differential: 10kΩ /150Ω

Signal Level

Single Ended: 0.2-20V P-P, Differential: 0.2-10V P-P

DC Offset

20V max Hi-Z

PCM Codes

Program selectable: NRZ-L/M/S, Biø-L/M/S, DBiø-M/S, MDM-M/S, RZ

Derandomizer

Program selectable: RNRZ 9/11/15/17/23, forward/reverse

IRIG Time Code Reader/Generator

Model 470M(Option – companion mezzanine module to Model 1612P, one per system)

IRIG Time Code Reader/Generator/Translator

Amplitude

0.5 to 20 Vpp, Single-ended

Impedance

12K Ohms minimum

Input Codes

Translates IRIG G, A, B, & NASA-36

Input Frequency

125 Hz to 400,000 Hz

Modulation Index

2:1 through 5:1

Polarity

Program selectable: Invert or Normal Polarity

Internal

Time Base 40MHz crystal oscillator

Generate Mode

Time is generated from the onboard crystal oscillator and is pre-settable from the Host

Translate Mode

Time is read from an external source

Translate Carrier Mode

The internal timing is based on the input carrier. This mode enables the system to translate time as the input carrier rate varies during playback of an analog recording

Translate Failsafe Mode

The internal timing is phase-locked to the input carrier. In the event of time dropout, the translator continues generating time without interrupt

Frame Bypass

Automatic frame bypass compares previous time frame with current one, and Time Accumulator updates when they agree